DocumentCode
3035938
Title
Logic synthesis for programmable logic devices
Author
Hwang, Ting-Tmg ; Owens, Robert Michael ; Irwin, Mary Jane
Author_Institution
Dept. of Comput. Sci., Pennsylvania State Univ., University Park, PA, USA
fYear
1990
fDate
17-19 Sep 1990
Firstpage
364
Lastpage
367
Abstract
The use of communication complexity based logic synthesis when configuring programmable logic devices (PLDs) is discussed. Configuration of a PLD involves the two processes of logic synthesis and logic embedding. Since the allowable PLD logic primitives usually include a very large number of gates, the processes of logic synthesis and technology mapping cannot be completely decoupled as they normally are in traditional logic synthesis systems. The proposed communication-complexity-based logic synthesis tool has the advantage of not completely decoupling these two processes. It is more suited to PLD configuring than other multilevel logic synthesis methods
Keywords
computational complexity; logic CAD; logic arrays; PLD; communication complexity; logic embedding; logic synthesis; programmable logic devices; technology mapping; Complexity theory; Computer science; Helium; Logic devices; Programmable logic arrays; Programmable logic devices; Random access memory; Switches; Very large scale integration; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-2079-X
Type
conf
DOI
10.1109/ICCD.1990.130255
Filename
130255
Link To Document