DocumentCode :
3036318
Title :
An improved algorithm for the minimization of mixed polarity Reed-Muller representations
Author :
Saul, J.M.
Author_Institution :
Dept. of Electr. & Electron. Eng., Bristol Univ., UK
fYear :
1990
fDate :
17-19 Sep 1990
Firstpage :
372
Lastpage :
375
Abstract :
The use of the Reed-Muller representation to represent and manipulate switching functions in logic synthesis systems is discussed. An algorithm for the minimization of mixed-polarity Reed-Muller representations to multiple-output incompletely specified switching functions is presented, in which heuristics are used to determine the best application of previously known rules for minimizing single-output equations; rules are used to link multiple-output functions and to minimize incompletely specified functions. This algorithm has been implemented, and benchmark comparisons with the best previous minimization method known shows that the method is faster and results in smaller representations
Keywords :
minimisation of switching nets; switching functions; heuristics; incompletely specified switching functions; logic synthesis; minimization; mixed-polarity Reed-Muller representations; multiple-output functions; Algorithm design and analysis; Circuits; Difference equations; Joining processes; Logic; Minimization methods; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2079-X
Type :
conf
DOI :
10.1109/ICCD.1990.130257
Filename :
130257
Link To Document :
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