Title :
Consider IC challenges for 40/100G system design reality check: Views from the physical layer
Author_Institution :
Transp. Syst. Eng., Vitesse Semicond. Corp., Camarillo, CA, USA
Abstract :
This paper reviews recent technology advances in 40/100G standardization efforts covering IEEE 802.3, OIF and ITU-T. In particular the associated physical-layer IC design challenges at higher speed are summarized to meet the ever-increasing bandwidth demands and cost/power expectations.
Keywords :
integrated circuits; local area networks; standardisation; 40/100G standardization; 40/100G system design; IC challenges; IEEE 802.3; ITU-T; OIF; physical layer; Acceleration; Bandwidth; Costs; Design engineering; Ethernet networks; Local area networks; Optical receivers; Physical layer; Standardization; Wavelength division multiplexing; 40/100G; Advanced Modulation scheme; Coherent; DSP; EDC; FEC; FPGA; Integrated circuits; SerDe;
Conference_Titel :
Wireless and Optical Communications Conference (WOCC), 2010 19th Annual
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-7597-1
DOI :
10.1109/WOCC.2010.5510644
