Title :
Uniform delayering of copper metallization
Author :
Siah, Y.W. ; Hong, Young June ; Liu, Quanwei ; Kor, H.B. ; Gan, C.L.
Author_Institution :
Temasek Labs., Nanyang Technol. Univ., Singapore, Singapore
Abstract :
Integrated circuit chips of newer technology usually have a larger die size and an increase number of metallization. Hence, pure usage of polishing to remove the layers would induce severe edge rounding. An alternative method is proposed to decrease the polishing time for copper metallization removal while reducing edge rounding on the sample during sample preparation that will preserve the integrity of the layers for further failure analysis.
Keywords :
copper; failure analysis; integrated circuit metallisation; integrated circuit reliability; polishing; specimen preparation; Cu; copper metallization removal; failure analysis; integrated circuit chip; polishing; sample preparation; severe edge rounding; uniform delayering; Decision support systems; Failure analysis; Integrated circuits; Delayering; copper metallization; polishing; sample preparation;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2013 20th IEEE International Symposium on the
Conference_Location :
Suzhou
Print_ISBN :
978-1-4799-1241-4
DOI :
10.1109/IPFA.2013.6599147
