DocumentCode :
3037907
Title :
Design and implementation of high-speed BCP processor for OBS core node based on FPGA
Author :
Zhang, Tairan ; Li, Xinwan ; Wu, Guiling ; Chen, Jianping
Author_Institution :
State Key Lab. of Adv. Opt. Commun. Syst. & Networks, Shanghai Jiao Tong Univ., Shanghai, China
fYear :
2010
fDate :
14-15 May 2010
Firstpage :
1
Lastpage :
3
Abstract :
The burst control packet (BCP) process time in the OBS core node is very important for the OBS networks. Although several OBS testbeds have been reported, the BCP process time in core node is still not fast enough. In this article, a new high-speed OBS core node BCP processor based on FPGA is proposed. In the processor, a new valid wavelength scheduling algorithm is created. Not only does it have high bandwidth utilization in scheduling valid wavelength, but also the scheduling time is less. The performance is that a BCP just needs only 180ns for processing when system clock is 200MHz, about 50ns used to schedule valid wavelength and 130ns for other issues in core node.
Keywords :
bandwidth allocation; field programmable gate arrays; optical burst switching; FPGA; bandwidth utilization; burst control packet processor; frequency 200 MHz; optical burst switching core node; time 130 ns; time 180 ns; time 50 ns; wavelength scheduling algorithm; Bandwidth; Business continuity; Clocks; Field programmable gate arrays; High speed optical techniques; Optical buffering; Optical control; Processor scheduling; Scheduling algorithm; Testing; BCP processor; FPGA; OBS; core node;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless and Optical Communications Conference (WOCC), 2010 19th Annual
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-7597-1
Type :
conf
DOI :
10.1109/WOCC.2010.5510678
Filename :
5510678
Link To Document :
بازگشت