Dynamic Current Modeling at the Instruction Level

Author

Rizo-Morente, Jose ; Casas-Sanchez, Miguel ; Bleakley, C.J.

Author_Institution

Sch. of Comput. Sci. & Informatics, UCD, Dublin

fYear

2006

fDate

4-6 Oct. 2006

Firstpage

95

Lastpage

100

Abstract

Estimation of processor current consumption is important for the design of low power systems. This paper proposes a novel method for estimating the dynamic current consumption of a processor. The method models dynamic current as the output of a linear system excited by a signal comprised of the total current due to each instruction. System identification is performed by cross-correlation of a pseudo-random stimulus with the measured current. The method was applied to the Texas Instruments TMS320VC5510 DSP and was found to provide an average correlation of 93% between estimated and measured dynamic current across a range of benchmarks

Keywords

digital signal processing chips; logic design; low-power electronics; TMS320VC5510 DSP; dynamic current modeling; linear system; low power systems; processor current consumption; Computer aided instruction; Computer architecture; Computer science; Current measurement; Digital signal processing; Energy consumption; Informatics; Power system dynamics; Power system modeling; User centered design; Design; Dynamic Instruction-level current model; Experimentation; Measurements; Verification; current and power measurement in a processor;

fLanguage

English

Publisher

ieee

Conference_Titel

Low Power Electronics and Design, 2006. ISLPED'06. Proceedings of the 2006 International Symposium on

Conference_Location

Tegernsee

Print_ISBN

1-59593-462-6

Type

conf

DOI

10.1109/LPE.2006.4271814

Filename

4271814