Dynamic HC-induced degradation in n-type poly-Si thin film transistors under off-state gate pulse voltage

Author

Huaisheng Wang ; Mingxiang Wang ; Meng Zhang

Author_Institution

Dept. of Microelectron., Soochow Univ., Suzhou, China

fYear

2013

fDate

15-19 July 2013

Firstpage

381

Lastpage

384

Abstract

Degradation behaviors of low temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) under gate pulse stresses immersing off-state are investigated. Hot carrier (HC) effect dominates the device degradation, which is determined by pulse base voltage (V_{g_b}) and falling time (t_f). More negative V_{g_b} and steeper t_f stimulate HC degradation severely and degenerate the device more seriously. Such kind of HC induced degradation can be explained by a non-equilibrium PN junction model during dynamic transition, in which the HCs is generated by the trapped carries emitting in high electric field of PN depleted region.

Keywords

elemental semiconductors; hot carriers; semiconductor device models; silicon; thin film transistors; HC effect; LTPS TFT; dynamic HC-induced degradation; dynamic transition; falling time; gate pulse stress; hot carrier effect; low-temperature polycrystalline silicon thin-film transistors; n-type poly-Si thin film transistors; nonequilibrium PN junction model; off-state gate pulse voltage; pulse base voltage; Degradation; Electric fields; Integrated circuit modeling; Junctions; Logic gates; Stress; Thin film transistors; dynamic stress; hot carrier effect; low temperature polycrystalline silicon (LTPS); non-equilibrium PN junction; thin-film transistor (TFT);

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits (IPFA), 2013 20th IEEE International Symposium on the

Conference_Location

Suzhou

ISSN

1946-1542

Print_ISBN

978-1-4799-1241-4

Type

conf

DOI

10.1109/IPFA.2013.6599186

Filename

6599186