Title :
Associative and data processing Mbit-DRAM
Author :
Kowarik, Oskar ; Kraus, Rainer ; Hoffmann, Kurt ; Horninger, Karl H.
Author_Institution :
Bundeswehr Univ. Munich, Neubiberg, Germany
Abstract :
The extension of a conventional Mbit-DRAM to an associative and data processing DRAM (ADRAM) using an additional multifunction circuit has been investigated. This circuit allows the application of associative or logical functions to many cells simultaneously in one memory cycle. The organization (e.g. string length, cascading, data structure, and masking) of the ADRAM is highly flexible and can be parameterized. An estimation based on a 4-Mb DRAM shows that the compare rate is 30×109 b/s
Keywords :
DRAM chips; associative and data processing DRAM; cascading; data structure; logical functions; masking; memory cycle; multifunction circuit; string length; Associative memory; Character recognition; Circuits; Data processing; Data structures; Parallel processing; Parameter estimation; Pattern recognition; Random access memory; Read-write memory;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2079-X
DOI :
10.1109/ICCD.1990.130267
