Failure mechanisms detected in memory chips during routine construction analysis

Author

Brown, Sue ; Campbell, Jeff ; Griffin, Sherri ; James, Dick ; Haythornthwaite, Ray

Author_Institution

Chipworks Inc., USA

fYear

1999

fDate

1999

Firstpage

34

Lastpage

39

Abstract

Construction analysis is a useful tool to determine microcircuit structure and identify potential failure mechanisms. Cross sectioning procedures used in construction analysis have revealed two possible failure mechanisms. One mechanism involving the use of SOG results in poor adhesion and delamination. The other mechanism permits the corrosion of internal conductors through a combination of discontinuities in the passivation at growth boundaries and internal damage

Keywords

adhesion; corrosion testing; delamination; failure analysis; integrated circuit reliability; integrated circuit testing; integrated memory circuits; passivation; SOG; adhesion; cross sectioning procedures; delamination; failure mechanisms; growth boundaries; internal conductor corrosion; internal damage; memory chips; microcircuit structure; passivation; routine construction analysis; spin on glass; Adhesives; Building materials; Conducting materials; Corrosion; Failure analysis; Moisture; Packaging; Passivation; Reverse engineering; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Memory Technology, Design and Testing, 1999. Records of the 1999 IEEE International Workshop on

Conference_Location

San Jose, CA

ISSN

1087-4852

Print_ISBN

0-7695-0259-8

Type

conf

DOI

10.1109/MTDT.1999.782681

Filename

782681