Title :
2-V, 1-GHz CMOS inductorless LNAs with 2-3 dB NF
Author_Institution :
Dept. of Electr. Eng., Ain Shams Univ., Cairo, Egypt
Abstract :
Two 1 GHz single-stage single-ended low noise amplifiers (LNAs), requiring one external inductor and matched to 50 Ω at both the input and output, have been designed using a 0.5 μm CMOS technology. Both LNAs employ a cascode topology with a resistive pull-up load and with no on-chip inductor. The second topology uses an AC-coupled active-inductor load to provide more selectivity and reject the image channel. The LNAs have a gain greater than 10 dB at 1 GHz with a noise figure lower than 3 dB at a power dissipation of 17 mW from a 2 V supply. The inductor-less LNA has an IIP3 of -3.8 dBm compared to the active-inductor LNAs IIP3 of -21 dBm and their reverse isolation is higher than 45 dB
Keywords :
CMOS integrated circuits; UHF amplifiers; UHF integrated circuits; impedance matching; inductors; integrated circuit design; network topology; 0.5 micron; 1 GHz; 10 dB; 17 mW; 2 V; 2 to 3 dB; 50 ohm; AC-coupled active-inductor load; CMOS inductorless LNAs; CMOS technology design; LNA gain; LNAs; active-inductor LNA IIP3; cascode topology; external inductor; image channel rejection; inductor-less LNA; input/output impedance matching; noise figure; power dissipation; resistive pull-up load; reverse isolation; selectivity; single-stage single-ended low noise amplifiers; Active inductors; CMOS technology; Filters; Impedance matching; Integrated circuit noise; Linearity; Noise figure; Noise measurement; Power dissipation; Topology;
Conference_Titel :
Microelectronics, 2000. ICM 2000. Proceedings of the 12th International Conference on
Conference_Location :
Tehran
Print_ISBN :
964-360-057-2
DOI :
10.1109/ICM.2000.916482