A 289 MFLOPS single-chip supercomputer

Reports on a single-chip supercomputer vector processing unit (VPU) which achieves peak performance of 149 MFLOPS for double-precision operation and 289 MFLOPS for single-precision operation with 560 MB/s bus bandwidth at 70 MHz. The VPU chip, fabricated using 0.5- mu m CMOS triple-metal-layer technology, contains about 1.5 million transistors on a 15.75*16.00 mm/sup 2/ die. The VPU uses a single instruction-stream multiple data-stream (SIMD) architecture on a single CMOS chip. The VPU implementation includes multiple vector pipelines operating concurrently, minimum pipeline latency, vectorized conditional branches, and an optimized instruction set for vector operations.<>