• DocumentCode
    3039030
  • Title

    Analytic modeling of the bias temperature instability using capture/emission time maps

  • Author

    Grasser, T. ; Wagner, P.-J. ; Reisinger, H. ; Aichinger, Th ; Pobegen, G. ; Nelhiebel, M. ; Kaczer, B.

  • Author_Institution
    Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria
  • fYear
    2011
  • fDate
    5-7 Dec. 2011
  • Abstract
    Despite a number of recent advances made in the understanding of the bias temperature instability (BTI), there is still no simple model available which can capture BTI degradation during DC or duty-factor (DF) dependent stress and the following recovery. By exploiting the intuitive features of the recently proposed capture/emission time (CET) maps [1, 2], we suggest an analytic model capable of handling a wide number of BTI stress and recovery patterns. As the model captures both the temperature- and bias- dependence of the degradation, it allows for realistic lifetime extrapolation. Compared to available models which do not consider the saturation of the degradation, our model predicts considerably more optimistic lifetimes.
  • Keywords
    extrapolation; integrated circuit modelling; stability; BTI degradation; DC dependent stress; analytic model; bias temperature instability; bias-dependence; capture/emission time maps; duty-factor dependent stress; intuitive features; lifetime extrapolation; optimistic lifetimes; recovery patterns; temperature-dependence; Analytical models; Data models; Degradation; Extrapolation; Gaussian distribution; Numerical models; Stress;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting (IEDM), 2011 IEEE International
  • Conference_Location
    Washington, DC
  • ISSN
    0163-1918
  • Print_ISBN
    978-1-4577-0506-9
  • Electronic_ISBN
    0163-1918
  • Type

    conf

  • DOI
    10.1109/IEDM.2011.6131624
  • Filename
    6131624