Cu - based catalysts can make CMOS compatible Si nanowires: Toward reconfigurable interconnects

CMOS compatible nanowires provide an interesting opportunity to integrate logic functions in interconnects levels. We report here the development of a method to grow silicon nanowire using back-end-of-line compatible copper-based catalysts. Our approach is based on oxidation of copper prior to growth and allows reducing silicon nanowire synthesis temperature below 450°C, a Back-end-of-line compatible temperature range. New functionalities permitted by silicon nanowires may therefore be added to interconnection levels.