Hot-carrier to cold-carrier device lifetime modeling with temperature for low power 40nm Si-bulk NMOS and PMOS FETs

Author

Bravaix, A. ; Huard, V. ; Goguenheim, D. ; Vincent, E.

Author_Institution

ISEN, IM2NP, Toulon, France

fYear

2011

fDate

5-7 Dec. 2011

Abstract

The persistence of hot-carrier degradation down to low voltages is analyzed in recent CMOS nodes through the effect of multivibration excitation (MVE) of the Si-H bonds and deexcitation by multiphonon emission. This new mechanism is described by an energy framework and originates from the channel current density independently of voltage and geometry. MVE mode is enhanced with temperature in NMOS and PMOS devices due to its strong coupling to the lattice disregarding the negative bias contribution in PMOS.

Keywords

CMOS integrated circuits; MOSFET; current density; elemental semiconductors; hot carriers; low-power electronics; semiconductor device models; silicon; CMOS nodes; PMOS FET; Si; Si-H bonds; Si-bulk NMOS FET; channel current density; cold carrier device lifetime; deexcitation; hot carrier degradation; hot carrier device lifetime; low power FET; multiphonon emission; multivibration excitation; negative bias contribution; size 40 nm; Couplings; Degradation; Logic gates; MOSFETs; Reliability; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2011 IEEE International

Conference_Location

Washington, DC

ISSN

0163-1918

Print_ISBN

978-1-4577-0506-9

Electronic_ISBN

0163-1918

Type

conf

DOI

10.1109/IEDM.2011.6131625

Filename

6131625