• DocumentCode
    3039185
  • Title

    Neuro chips with on-chip backprop and/or Hebbian learning

  • Author

    Shima, T. ; Kimura, T. ; Kamatani, Y. ; Itakura, T. ; Fujita, Y. ; Iida, T.

  • Author_Institution
    Toshiba Corp., Kawasaki, Japan
  • fYear
    1992
  • fDate
    19-21 Feb. 1992
  • Firstpage
    138
  • Lastpage
    139
  • Abstract
    In a neural network, neurons and synapses are two unit functions. If the learning procedures are assigned appropriately, they can be placed in tiling form. This arrangement is potentially expandable if constructed of two separate LSI chips, a synapse chip and a neuron chip. The authors describe such an implementation. A single synapse configuration is shown along with a synapse group with 64 synapses and a learning control circuit. A single neuron functional block diagram is presented, and synapse characteristics are shown.<>
  • Keywords
    Hebbian learning; backpropagation; large scale integration; neural nets; Hebbian learning; LSI chips; learning control circuit; neural network; neuron functional block diagram; neurons; on-chip backprop; synapse group; synapses; tiling form; unit functions; Circuit simulation; Computational modeling; Computer networks; Computer simulation; Distributed processing; Hebbian theory; Neurons;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1992. Digest of Technical Papers. 39th ISSCC, 1992 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-7803-0573-6
  • Type

    conf

  • DOI
    10.1109/ISSCC.1992.200450
  • Filename
    200450