DocumentCode :
3039227
Title :
A novel atomic layer oxidation technique for EOT scaling in gate-last high-к/metal gate CMOS technology
Author :
Dai, Min ; Liu, Jinping ; Guo, Dechao ; Krishnan, Siddarth ; Shepard, Joseph F. ; Ronsheim, Paul ; Kwon, Unoh ; Siddiqui, Shahab ; Krishnan, Rishikesh ; Li, Zhengwen ; Zhao, Kai ; Sudijono, John ; Chudzik, Michael P.
Author_Institution :
Microelectron. Div., IBM, Hopewell Junction, NY, USA
fYear :
2011
fDate :
5-7 Dec. 2011
Abstract :
We demonstrated sub-1nm equivalent oxide thickness (EOT) for a gate-last high-k/metal scheme. This is enabled by (1) controllable 1000°C high temperature atomic layer oxidation on a chemical oxide (chemox) to form <; 0.5 nm high quality SiO2 interfacial layer (IL); (2) nitrogen profile optimization on post high- k nitridation and anneal. Competitive gate leakage and mobility are achieved at the scaled EOT compared to a chemox IL control (0.2 nm thinner). The physical properties of the gate stack are studied by XPS and SIMS analysis.
Keywords :
CMOS integrated circuits; X-ray photoelectron spectra; annealing; high-k dielectric thin films; optimisation; oxidation; scaling circuits; secondary ion mass spectra; silicon compounds; CMOS technology; EOT scaling; SIMS analysis; SiO2; XPS analysis; annealing; chemical oxide; equivalent oxide thickness; gate leakage; gate stack; gate-last high-k/metal gate; high temperature atomic layer oxidation; high-k nitridation; interfacial layer; mobility; nitrogen profile optimization; physical properties; temperature 1000 degC; Annealing; Atomic layer deposition; Chemicals; Hafnium compounds; Logic gates; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2011 IEEE International
Conference_Location :
Washington, DC
ISSN :
0163-1918
Print_ISBN :
978-1-4577-0506-9
Electronic_ISBN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.2011.6131632
Filename :
6131632
Link To Document :
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