A Mixed HW-SW System for Fast Codebook Generation with the LBG Algorithm

This paper presents the logical structure and physical design of a mixed software-hardware system developed for fast codebook generation using the well known LBG algorithm. The system uses a neurocoprocessor based on a Self Organization Feature Map (SOM) in order to make a HW-SW partition of algorithm tasks. The clustering task, the most time demanding, is carried out by hardware, exploiting the intrinsic parallelism of neural networks. The reduction in the required amount of sequential operations is proportional to 2N/Log₂N, where N is the codebook final size. The experimentation showed a training time reduction up to 90%.