Reliability characterization exploring extreme conditions for chips´ design optimization

Lifetime determination is one of the reliability key tasks to have an accurate estimation of the period of time that can still survive with a certain confidence level under the specific operating conditions to perform the respective function of the applications. Various reliability tests have been designed to reveal and assess the respective wear-out degradation mechanisms. This paper presents herewith, the methodology of reliability characterization from the lifetime empirical models so as to define the corresponding Safe Operating Area (SOA) exploring to the extreme limits (in terms of operating voltages, junction temperature, area of interests or other critical dimensions, confidence bounds corresponding to failures ppm level, degradation parameters etc...). Modeling of lifetimes among these critical parameters can be done in order to find an optimized solution for a specific design. As such, a thorough reliability characterization is very important for the robust design for reliability.