• DocumentCode
    3039671
  • Title

    Programmable synthesis using a new "Speech microprocessor"

  • Author

    Caldwell, James L.

  • Author_Institution
    Telesensory Systems Inc., Palo Alto, California
  • Volume
    5
  • fYear
    1980
  • fDate
    29312
  • Firstpage
    868
  • Lastpage
    871
  • Abstract
    In the past, real-time speech synthesis has been achieved using either relatively expensive special hardware or custom integrated circuitry which implements a single synthesis algorithm. In order to fill a need for low cost, high quality synthesis with algorithm flexibility, two NMOS LSI devices which implement a programmable "speech microprocessor" have been developed. By orienting the architecture toward common features of several classes of digital vocal tract models, synthesis computations involving a large number of multiplies, adds, and other operations can be performed efficiently. For example, the processor can implement a complex cascade/parallel formant synthesizer or a lattice filter with up to fourteen poles. The LSI chip set will become commerically available in mid-1980.
  • Keywords
    Circuit synthesis; Computational modeling; Computer architecture; Costs; Hardware; Integrated circuit synthesis; Large scale integration; MOS devices; Microprocessors; Speech synthesis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '80.
  • Type

    conf

  • DOI
    10.1109/ICASSP.1980.1170867
  • Filename
    1170867