DocumentCode
3039711
Title
Experiences with the MTCA.4 solution for the EuXFEL clock and control system
Author
Motuk, E. ; Postranecky, M. ; Warren, M. ; Wing, Matthew
Author_Institution
Dept. of Phys. & Astron., Univ. Coll. London, London, UK
fYear
2012
fDate
9-15 June 2012
Firstpage
1
Lastpage
6
Abstract
The clock and control (CC) system for the EuXFEL megapixel detectors consists of a multi-purpose MTCA.4 AMC card with a Xilinx FPGA and a custom designed Rear Transition Module (RTM) which provides the CC functionality. The system resides in a MTCA.4 crate with the Timing Receiver (TR) board and synchronises the DAQ system to the general EuXFEL timing. This paper presents the experiences with the prototype system in addition to describing the RTM hardware and the CC system firmware in detail. The tests that have been performed to validate the basic MTCA.4 specifications related functionality are presented first. The next stage of tests involve confirming the system functionality by using the TR board as it would be in the EuXFEL DAQ system and a development board to simulate a Front End Electronics (FEE) unit. The performance metrics in terms of jitter and bit error rates for FEE communication are presented. As a result of the performance tests, the improvements and modifications to the current hardware for the final system are outlined in the conclusions.
Keywords
data acquisition; error statistics; field programmable gate arrays; high energy physics instrumentation computing; jitter; microcontrollers; nuclear electronics; position sensitive particle detectors; synchronisation; timing circuits; CC functionality; CC system firmware; EuXFEL DAQ system; EuXFEL megapixel detectors; FEE communication; MTCA.4 crate; MTCA.4 specifications; RTM hardware; Xilinx FPGA; bit error rates; clock system; control system; final system hardware; frontend electronics unit; general EuXFEL timing; jitter terms; multi-purpose MTCA.4 AMC card; prototype system; rear transition module; system functionality; timing receiver board; Clocks; Detectors; Field programmable gate arrays; Jitter; Receivers; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Real Time Conference (RT), 2012 18th IEEE-NPSS
Conference_Location
Berkeley, CA
Print_ISBN
978-1-4673-1082-6
Type
conf
DOI
10.1109/RTC.2012.6418096
Filename
6418096
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