An area estimation technique for module generation

Module generators for adders and shifts that work at the netlist-level due to complexity of design space exploration are discussed. The module generators deal only with the netlists composed of standard macros. The objective is to use the VPNR standard-cell-based placement and route system for the layout synthesis from the generated netlist. The netlist level generation also provides the additional benefit of technology independence. It is feasible to build an accurate model for area and RC-delay of the physical layouts generated by a layout synthesis system. VPNR does an extremely good job of retaining the analytically derived area form, to within 3-8%. This well-behaved aspect of the layout synthesis systems can be used to free the module generators from working at the layout level. The module generators can instead focus their activities at the netlist level, which give them better design space exploration capabilities