A 2-chip 1.5 Gb/s bus-oriented serial link interface

The authors report a monolithic transmitter and receiver chip pair which implements a full-duplex virtual ribbon cable interface. For short-distance applications, on-chip equalizer is provided to allow use of coaxial cables rather than a more costly fiber link. The chips require no external frequency-determining elements or user adjustments and operate over a range of 600 to 1500 MHz using an on-chip VCO (voltage-controlled oscillator). Only one in-package capacitor per chip is required. A state-machine controller (SMC) is also implemented on the RX chip to transparently handle a start-up handshake protocol. This is the highest-speed-link-interface chipset reported to date at this level of functionality and integration.<>