DocumentCode
3039880
Title
Evaluation methodology for random telegraph noise effects in SRAM arrays
Author
Yamaoka, M. ; Miki, H. ; Bansal, A. ; Wu, S. ; Frank, D.J. ; Leobandung, E. ; Torii, K.
Author_Institution
Semicond. Innovation Res. Project, Hitachi America Ltd., Yorktown Heights, NY, USA
fYear
2011
fDate
5-7 Dec. 2011
Abstract
We propose a novel method to evaluate the impact of RTN on SRAM, and have demonstrated and proved the RTN effects are indeed present in SRAM by both simulation and experiments. Our results also determine the necessary voltage guard band to prevent SRAM yield loss.
Keywords
SRAM chips; RTN effect; SRAM array; SRAM yield loss; evaluation methodology; random telegraph noise effect; voltage guard band; FETs; Noise; Probability; Random access memory; Stability analysis; Time measurement; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2011 IEEE International
Conference_Location
Washington, DC
ISSN
0163-1918
Print_ISBN
978-1-4577-0506-9
Electronic_ISBN
0163-1918
Type
conf
DOI
10.1109/IEDM.2011.6131656
Filename
6131656
Link To Document