Title :
A VLSI fuzzy processor with parallel rule execution
Author :
Jacomet, Marcel ; Wälti, Roger
Author_Institution :
Tech. Eng. Sch., Biel-Bienne, Switzerland
Abstract :
This paper describes the architecture of a VLSI fuzzy processor, which is fabricated in the 0.7 μm digital CMOS technology from ES2. Due to the parallel architecture of the fuzzy rule block, very high performance is achieved. The architecture supports fine tuning and optimization of fuzzy systems by the possibility to weight each fuzzy rule separately
Keywords :
CMOS logic circuits; VLSI; fuzzy logic; fuzzy systems; inference mechanisms; 0.7 μm digital CMOS technology; 0.7 mum; VLSI fuzzy processor; fuzzy rule block; fuzzy rule weighting; fuzzy systems; parallel architecture; parallel rule execution; Application software; CMOS process; CMOS technology; Data models; Fuzzy logic; Fuzzy sets; Fuzzy systems; Input variables; Paper technology; Very large scale integration;
Conference_Titel :
Fuzzy Systems, 1996., Proceedings of the Fifth IEEE International Conference on
Conference_Location :
New Orleans, LA
Print_ISBN :
0-7803-3645-3
DOI :
10.1109/FUZZY.1996.551800
