• DocumentCode
    3039992
  • Title

    Digital neural network implementation

  • Author

    Swartzlander, Earl E., Jr. ; Jones, Robert F., Jr.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
  • fYear
    1992
  • fDate
    1-3 April 1992
  • Firstpage
    722
  • Lastpage
    728
  • Abstract
    The authors provide a comparison of implementation approaches for digital neural networks. Digital neural networks of large size are feasible if the inputs and outputs are single-bit binary signals. A key component for this application is the parallel counter, which counts the number of inputs that are ONEs. Progress is reported toward the implementation of parallel counters with up to 1022 inputs, as required to realize multilayer neural networks with up to 1000 neurons per layer.<>
  • Keywords
    counting circuits; digital arithmetic; neural nets; digital neural networks; multilayer neural networks; parallel counter; single-bit binary signals; Adders; Application software; Counting circuits; Integrated circuit technology; Logic gates; Multi-layer neural network; Neural networks; Neurons; Vectors; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computers and Communications, 1992. Conference Proceedings., Eleventh Annual International Phoenix Conference on
  • Conference_Location
    Scottsdale, AZ, USA
  • Print_ISBN
    0-7803-0605-8
  • Type

    conf

  • DOI
    10.1109/PCCC.1992.200512
  • Filename
    200512