• DocumentCode
    3040158
  • Title

    Modeling of NMOS performance gains from edge dislocation stress

  • Author

    Weber, Cory E. ; Cea, Stephen M. ; Deshpande, Hemant ; Golonzka, Oleg ; Liu, Mark Y.

  • Author_Institution
    Process Technol. Modeling, Hillsboro, OR, USA
  • fYear
    2011
  • fDate
    5-7 Dec. 2011
  • Abstract
    Stress from edge dislocations introduced by solid phase epitaxial regrowth increases as gate pitch is scaled, reaching 1GPa at 100nm gate pitch. This scaling trend makes edge dislocations attractive for future technology nodes, as stress from epitaxial and deposited film stressors reduces as pitch is scaled (1,2). We show a gate last flow is best for maximizing the dislocation stress, and the stress varies with layout and topography. We arrive at these results by the application of the finite element method to model the dislocation stress.
  • Keywords
    MOS integrated circuits; edge dislocations; solid phase epitaxial growth; NMOS performance gains; edge dislocation stress; finite element method; gate pitch; solid phase epitaxial regrowth; Finite element methods; Logic gates; MOS devices; Semiconductor process modeling; Stress; Surface topography; Surface treatment;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting (IEDM), 2011 IEEE International
  • Conference_Location
    Washington, DC
  • ISSN
    0163-1918
  • Print_ISBN
    978-1-4577-0506-9
  • Electronic_ISBN
    0163-1918
  • Type

    conf

  • DOI
    10.1109/IEDM.2011.6131670
  • Filename
    6131670