Title :
An FPGA based GEMROC readout system
Author :
Mindur, B. ; Dabrowski, W. ; Fiutowski, T. ; Wiacek, P. ; Zielinska, A.
Author_Institution :
Fac. of Phys. & Appl. Comput. Sci., AGH Univ. of Sci. & Technol., Kraków, Poland
Abstract :
A Gas Electron Multiplier Readout Chip (GEMROC) is an Application Specific Integrated Circuit (ASIC) dedicated for 2-dimensional (2-D) strip readout of a Gas Electron Multiplier (GEM) detectors. The ASICs deliver the amplitudes and time coordinates of the signals recorded on two sets of orthogonal strips. Timing information is used for finding coincidences of signals on two spatial coordinates and amplitude information is used to find the centre of gravity for the cluster of signals belonging to the same detection event. In this paper we present a Field Programmable Gate Array (FPGA) Ethernet based compact readout system dedicated for these ASICs. The readout system consists of two synchronized FPGA-ADC boards connected to four front-end boards, each one equipped with two GEMROCs. Both FPGAs are connected to a host PC using separate Gigabit Ethernet links. The DAQ PC is equipped with a dedicated C++ based software which is responsible for a configuration of the FPGAs and ASICs settings, storing all the incoming data as well as online/offline data reconstruction and visualization.
Keywords :
analogue-digital conversion; application specific integrated circuits; electron multipliers; field programmable gate arrays; gravity; high energy physics instrumentation computing; local area networks; readout electronics; signal detection; 2-dimensional strip readout; ASIC settings; DAQ PC; FPGA Ethernet based compact readout system; FPGA based GEMROC readout system; FPGA settings; FPGA-ADC boards; GEM detectors; Gigabit Ethernet links; amplitude information; application specific integrated circuit; dedicated C++ based software; field programmable gate array Ethernet based compact readout system; front-end boards; gas electron multiplier detectors; gas electron multiplier readout chip; offline data reconstruction; offline data visualization; online data reconstruction; online data visualization; orthogonal strips; signal amplitudes; signal detection; time coordinates; timing information; Application specific integrated circuits; Clocks; Connectors; Data acquisition; Detectors; Field programmable gate arrays; Synchronization;
Conference_Titel :
Real Time Conference (RT), 2012 18th IEEE-NPSS
Conference_Location :
Berkeley, CA
Print_ISBN :
978-1-4673-1082-6
DOI :
10.1109/RTC.2012.6418151