ATLAS IBL BOC prototype evaluation

The Pixel Detector of the ATLAS experiment at CERN will be upgraded with an Insertable B-Layer (IBL) in 2013. For this fourth and innermost layer 448 newly developed pixel sensor readout chips (FE-I4) are used which will provide data from about 12 million pixel. For the readout of these chips new off-detector electronic components are needed as the FE-I4s feature an increased readout bandwidth which can not be handled by the current system. To provide a degree of backward compatibility the new system will keep the structure of VME card pairs: The back of crate card (BOC) establishes the optical interfaces to the detector front end as well as to the read out system (ROS) while the read out driver (ROD) manages data processing and calibration. Both cards, the BOC and the ROD, have been redesigned and feature modern FPGA technology, yielding an integration four times higher than the current system. This paper will describe the concept of hard- and firmware of the new IBL BOC and present results of the testing with the first prototypes.