Design of the Trigger Interface and Distribution board for CEBAF 12 GeV Upgrade

Author

Gu, Jhen-Fong ; Abbott, Derek ; Cuevas, C. ; Dong, Hongguang ; Gyurjyan, V. ; Heyes, G. ; Jastrzembski, E. ; Kaneta, S. ; Nganga, N. ; Moffit, B. ; Raydo, B. ; Timmer, C. ; Wilson, James

Author_Institution

Thomas Jefferson Nat. Accel. Lab. (TJNAL), Newport News, VA, USA

fYear

2012

fDate

9-15 June 2012

Firstpage

1

Lastpage

7

Abstract

The design of the Trigger Interface and Distribution (TID) [1] board for the 12 GeV Upgrade [2] at the Continues Electron Beam Accelerator Facility (CEBAF) in TJNAL is described. The TID board distributes a low jitter system clock, synchronized trigger, and synchronized multi-purpose SYNC signal. The TID also initiates data acquisition for the crate. With the TID boards, a multi-crate system can be setup for experiment test and commissioning.

Keywords

clocks; data acquisition; electric connectors; field programmable gate arrays; jitter; nuclear electronics; optical fibres; synchronisation; trigger circuits; CEBAF upgrade; Continues Electron Beam Accelerator Facility; TD monitors; TID boards; TJNAL; VME P2 connector; VME64 crate; VXS P0 connector; VXS crate; data acquisition; distribution board; electron volt energy 12 GeV; field programmable gate arrays; front end crates; front panel; low jitter system clock; multicrate system; optical fibres; synchronized multipurpose SYNC signal; synchronized trigger; trigger flow control; trigger interface board; trigger processing; trigger supervisor; Clocks; Field programmable gate arrays; Optical fibers; Switches; Synchronization; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Real Time Conference (RT), 2012 18th IEEE-NPSS

Conference_Location

Berkeley, CA

Print_ISBN

978-1-4673-1082-6

Type

conf

DOI

10.1109/RTC.2012.6418161

Filename

6418161