Exploring silicon process technology through RIT´S NPN BJT process

At RIT, a vertical NPN BJT process laboratory is used in an intermediate level course in silicon process technology. The laboratory is designed to put into practice the theories (i.e. crystal defects, diffusion, oxidation, ion-implant) discussed in the lecture material. Through this laboratory the students gain further understanding of the operation of the bipolar junction transistor, as well as an appreciation for manufacturing issues such as parameter variation and device yield. In addition to device fabrication and test, another important part of the laboratory is process simulation using TMA SUPREM-IV for structural simulation and TMA MEDICI for electrical simulation. In this paper, NPN BJT process and electrical test results will be discussed along with simulation results as it would be presented in an actual student project report. In addition, the success of using the NPN BJT process in a laboratory to teach silicon processes will be described, emphasizing the importance of a hands-on approach to microelectronic engineering education