Intelligent design automation of VLSI interconnects

Author

Hsu, Pochang ; Voranantakul, Suwan ; Rozenblit, J.W. ; Prince, John L.

Author_Institution

Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA

fYear

1992

fDate

1-3 April 1992

Firstpage

349

Lastpage

355

Abstract

Design automation for VLSI packaging and interconnections is considered. A window-based simulation environment called packaging design support environment (PDSE) which integrates several tools for VLSI interconnection modeling and simulations is presented. The authors describe the concept of the automated packaging design cycle, the structure and the components of the simulation environment, and the implementation of an interconnect layout geometry data extractor. A case study is included to illustrate the entire design process.<>

Keywords

VLSI; circuit layout CAD; programming environments; VLSI interconnects; intelligent design automation; layout geometry data extractor; packaging design support environment; window-based simulation environment; Circuit simulation; Conductors; Design automation; Distributed parameter circuits; Electronics packaging; Geometry; Integrated circuit interconnections; Parameter extraction; Transmission line matrix methods; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Computers and Communications, 1992. Conference Proceedings., Eleventh Annual International Phoenix Conference on

Conference_Location

Scottsdale, AZ, USA

Print_ISBN

0-7803-0605-8

Type

conf

DOI

10.1109/PCCC.1992.200577

Filename

200577