Floating-point arithmetic for digital signal processing

While it is generally admitted that digital signal processing (DSP) has distinct advantages over analog techniques, until recently digital could not compete in most applications due to cost, size, and power constraints. Not surprisingly, advances in VLSI technology in the last few years have changed this situation. A hardware multiplier was produced, solving the worst problem in the digital area, and it later evolved to become a full arithmetic unit for DSP for fixed-point applications A next step in this evolution is the use of floating point arithmetic in signal processing. This paper will discuss the tradeoffs involved in designing a floating point arithmetic chip set in LSI technology.