A high density time to digital converter module for BESIII end-cap TOF upgrade

This paper describes the high precision time measurement for the end-cap time of flight (ETOF) upgrade of a Beijing Spectrometer (BESIII). After upgrade, ETOF will be built using Multigap Resistive Plate Chambers (MRPC) and will have 1728 readout channels which is a big challenge for the readout electronics. The time resolution of the readout electronics system is required to be better than 25 ps. A 9U VME module with 72 time measurement channels is designed to perform particles flight time measurement. The signals, which are produced by the detector and then amplified and discriminated by the frontend electronics, are sent to the time-to-digital converter (TDIG) module to be digitized. The TDIG module uses the CERN HPTDC technique to achieve high precision time-to-digital converter and totally applies nine HPTDC chips to realize 72 channels. The primary hit measurements from HPTDC chips are forwarded to one Altera field-programmable gate array (FPGA) to be processed. Finally, the data are sent to DAQ server by Ethernet. The VME interface logic is implemented in an Altera CPLD. The TDIG module can also accept an external trigger and pick out the expected events which are correlated with the given trigger. A series of experiment tests show that the time resolution of the TDIG module is better than 20 ps.