Title :
Deep subhalf-micron BiCMOS technology using synchrotron X-ray lithography and its application to 58 ps 2 V CMOS gate array
Author :
Kyuragi, H. ; Konaka, S. ; Kobayashi, T. ; Deguchi, K. ; Yamamoto, E. ; Ohki, S. ; Yamamoto, Y.
Author_Institution :
NTT LSI Lab., Kanagawa, Japan
Abstract :
Deep sub-half-micron BiCMOS technology using synchrotron X-ray lithography and two-level metallization featuring planarization and selective CVD Al plugs is described. The process achieves a 0.24- mu m-wide first wiring resist pattern and contact resistivity of 5*10/sup -10/ Omega -cm/sup 2/ for a 0.25- mu m via hole. A 4 K-gate 0.25- mu m CMOS gate array LSI that operates at 58 ps/gate at 2 V was fabricated. This result demonstrates the efficacy of synchrotron X-ray lithography in the fabrication of sub-quarter-micron BiCMOS ULSIs.<>
Keywords :
BiCMOS integrated circuits; CMOS integrated circuits; X-ray lithography; integrated circuit technology; logic arrays; metallisation; synchrotron radiation; 0.25 micron; 2 V; 58 ps; CMOS gate array; LSI; ULSIs; contact resistivity; first wiring resist pattern; planarization; selective CVD; subhalf-micron; synchrotron X-ray lithography; technology; two-level metallization; BiCMOS integrated circuits; Conductivity; Large scale integration; Metallization; Planarization; Plugs; Resists; Synchrotrons; Wiring; X-ray lithography;
Conference_Titel :
VLSI Technology, 1992. Digest of Technical Papers. 1992 Symposium on
Conference_Location :
Seattle, WA, USA
Print_ISBN :
0-7803-0698-8
DOI :
10.1109/VLSIT.1992.200627
