Title :
A self-learning neural-network LSI using neuron MOSFETs
Author :
Shibata, T. ; Ohmi, T.
Author_Institution :
Dept. of Electron. Eng., Tohoku Univ., Sendai, Japan
Abstract :
A functional MOS transistor called a neuron MOSFET (vMOS) which simulates the function of biological neurons is discussed. A method of constructing neural network LSIs that have a self-learning capability using the neuron MOSFET is given. The key is the implementation of a synaptic connection which changes its weight according to various learning algorithms. In addition, the synapse must be free from standby power dissipation and be as small as possible.<>
Keywords :
CMOS integrated circuits; VLSI; insulated gate field effect transistors; learning (artificial intelligence); neural chips; CMOS technology; learning algorithms; neuron MOSFET; self-learning neural-network LSI; synaptic connection; Biological system modeling; Coupling circuits; Large scale integration; MOS devices; MOSFETs; Neural networks; Neurons; Nonvolatile memory; Power dissipation; Threshold voltage;
Conference_Titel :
VLSI Technology, 1992. Digest of Technical Papers. 1992 Symposium on
Conference_Location :
Seattle, WA, USA
Print_ISBN :
0-7803-0698-8
DOI :
10.1109/VLSIT.1992.200660
