DocumentCode
3042505
Title
Designing highly parameterized hardware using xHDL
Author
Sánchez, Miguel Angel ; Echeverría, Pedro ; Mansilla, Francisco ; López-Vallejo, Marisa
Author_Institution
Dept. of Electron. Eng., Univ. Politec. de Madrid, Madrid
fYear
2008
fDate
23-25 Sept. 2008
Firstpage
78
Lastpage
83
Abstract
Current submicron technologies allow a very high degree of integration, resulting in incredibly complex designs implemented in a single chip. The task of the hardware designer is every day more complicated since the data and parameters involved in a design are wider and with increasing complexity in the interfaces. Modular design is needed to deal with these large, regular and repetitive structures. With this purpose the meta-language xHDL was conceived, providing flexible and friendly mechanisms for component parameterization, customization, instantiation and interconnection. In this paper two case studies will be analyzed in depth to illustrate the advantages of using xHDL. Based on the lessons learnt when specifying the case studies the meta-language has been extended to deal with new advanced features such as instantiation of external VHDL components and automatic generation of libraries of components.
Keywords
formal specification; hardware description languages; VHDL components; automatic component library generation; component customization; component instantiation; component interconnection; component parameterization; highly parameterized hardware design; modular design; repetitive structure; submicron technology; xHDL meta-language; Artificial intelligence; Design engineering; Hardware design languages; Image processing; Libraries; Power generation; Signal processing; Software engineering; Space exploration; Spirals;
fLanguage
English
Publisher
ieee
Conference_Titel
Specification, Verification and Design Languages, 2008. FDL 2008. Forum on
Conference_Location
Stuttgart
Print_ISBN
978-1-4244-2264-7
Type
conf
DOI
10.1109/FDL.2008.4641425
Filename
4641425
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