1.5V 0.5mW 2MSPS 10B DAC with rail-to-rail output in 0.13μm CMOS technology

Author

Ge, Fuding ; Trivedi, Malay ; Thomas, Brent ; Jiang, William ; Song, Hongjiang

Author_Institution

Intel Corp., Chandler, AZ

fYear

2008

fDate

17-20 Sept. 2008

Firstpage

257

Lastpage

260

Abstract

This paper presents the design and measurement results of a low power high linear digital-to-analog converter in 0.13 mum CMOS. It is powered by a single 1.5 V power supply offering rail-to-rail output capability. The DAC circuit is based on segmented resistor strings to scale the bandgap voltage references. The design of the advanced class-AB amplifier with rail-to-rail input/output for analog output buffering is given in details. Techniques to improve resistor string matching performance to 10-bit resolution are discussed. An effective output de-glitching circuitry is presented. The DAC can operate at 2.0 MSPS with power consumption of 0.5 mW.

Keywords

CMOS integrated circuits; digital-analogue conversion; CMOS technology; DAC circuit; advanced class-AB amplifier; analog output buffering; bandgap voltage references; low power high linear digital-to-analog converter; output de-glitching circuitry; power 0.5 mW; power supply; rail-to-rail output; segmented resistor strings; voltage 1.5 V; CMOS technology; Circuits; Digital-analog conversion; Photonic band gap; Power measurement; Power supplies; Rail to rail amplifiers; Rail to rail outputs; Resistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2008 IEEE International

Conference_Location

Newport Beach, CA

Print_ISBN

978-1-4244-2596-9

Electronic_ISBN

978-1-4244-2597-6

Type

conf

DOI

10.1109/SOCC.2008.4641523

Filename

4641523