A 6-Gbit/s SATA spread-spectrum clock generator using two-stage delta-sigma modulator

This work presents a new architecture of spread-spectrum clock generator providing 1.5-Gbit/s, 3-Gbit/s and 6-Gibt/s SATA compatible specifications. A two-stage delta-sigma modulator is proposed to simplify the hardware and to overcome the nonlinearity issue of triangular control voltage induced by supply voltage, process and temperature variations. The peak energy of the output clock spectrum is reduced by 17.3 dB at 6-GHz. The chip is designed in a 0.18-um CMOS process with an area of 0.57times0.45 mm². The power consumption is 106 mW at a power supply of 1.8-V.