Design and verification of complex SoC with configurable, extensible processors

Summary form only given. As SoCs continue to evolve to have more and more programmable elements and processors on them, the opportunity to tune the processors, interconnect and other blocks to match the intended application and gain advantages of performance and energy consumption is one that many designers are still not aware of. Experience on a wide variety of SoC designs has shown that significant increases in SoC performance and reduction in energy consumption are possible through the use of tuned Application-Specific Instruction set Processors (ASIPs), along with the right choices of interconnect structures and associated hardware blocks. This embedded tutorial introduces the audience to the concept of ASIPs and uses practical examples to illustrate how ASIP architectures can be mapped to applications. It also covers a processor-centric design flow for complex SoC and in particular will describe models and methodologies for design, simulation and verification of these devices using the latest electronic system level (ESL) methods.