Low-power 4-bit flash ADC for digitally controlled DC-DC converter

Author

Yu, Guolei ; Siek, Liter

Author_Institution

VIRTUS - IC Design Center of Excellence, Nanyang Technol. Univ., Singapore, Singapore

fYear

2011

fDate

12-14 Dec. 2011

Firstpage

605

Lastpage

608

Abstract

A low-power flash analog-to-digital converter (ADC) using logic gates as comparators is presented. The circuit is designed by using 0.35μm CMOS technology. A conversion delay of 12.55ns has been achieved at 200 Mega sample per second (MSPS). The static current consumptions at zero error bit from the power supply and sampled input are 63μA and 93μA respectively. The high speed and low power characteristic make the ADC structure ideal for the high frequency digitally controlled DC-DC converter applications.

Keywords

CMOS integrated circuits; DC-DC power convertors; analogue-digital conversion; comparators (circuits); digital control; logic gates; low-power electronics; CMOS technology; comparators; current 63 muA; current 93 muA; high frequency digitally controlled DC-DC converter; logic gates; low power characteristic; low-power flash ADC structure; low-power flash analog-to-digital converter; size 0.35 mum; static current consumptions; time 12.55 ns; word length 4 bit; zero bit error; Inverters; Logic gates; Power supplies; Switches; Threshold voltage; Transient analysis; Voltage control; DC-DC converter; digital control; flash ADC;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits (ISIC), 2011 13th International Symposium on

Conference_Location

Singapore

Print_ISBN

978-1-61284-863-1

Type

conf

DOI

10.1109/ISICir.2011.6131935

Filename

6131935