DocumentCode
3045089
Title
1-bit heuristic adaptive quantizer (HAQ) for on chip image compression in CMOS image sensors
Author
Barrow, Michael ; Bermak, Amine ; Chen, Shoushun
Author_Institution
ECE Dept., Hong Kong Univ. of Sci. & Technol., Hong Kong, China
fYear
2011
fDate
12-14 Dec. 2011
Firstpage
613
Lastpage
616
Abstract
This paper presents an algorithm for implementing a single bit adaptive quantizer based on fast boundary adaptation rule (FBAR). The peak signal to noise ratio (PSNR) gain and performance gain of the algorithm over prior designs is found to be larger than that displayed by prior art compared with a reference FBAR implementation. A maximum increase of 1.44db was seen. In addition, the new design facilitates an improved bits per pixel ratio (bpp) when integrated with the QTD compressor utilized in previous prototypes. The presented algorithm is hardware friendly and designed for low power implementation, with simulation results also showing an improvement of relative energy cost over previous work. Experimental evidence for image sizes ranging from 64×64 pixels to 512×512 pixels and the heuristic adaptive quantizer (HAQ) algorithm are detailed in this paper.
Keywords
CMOS image sensors; data compression; image coding; CMOS image sensors; fast boundary adaptation rule; heuristic adaptive quantizer; on chip image compression; Art; CMOS image sensors; Hardware; Image coding; PSNR; Quantization; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits (ISIC), 2011 13th International Symposium on
Conference_Location
Singapore
Print_ISBN
978-1-61284-863-1
Type
conf
DOI
10.1109/ISICir.2011.6131937
Filename
6131937
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