Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling

Author

Variyam, Pramodchandran N. ; Chatterjee, Abhijit ; Nagi, Naveena

Author_Institution

Sch. of Electr. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

fYear

1997

fDate

27 Apr-1 May 1997

Firstpage

261

Lastpage

266

Abstract

In this paper an efficient low-cost built-in self test (BIST) scheme is proposed for analog circuits. The key idea is to use rectangular pulses of random widths obtained directly from a digital linear feedback shift register to perform transient testing of the circuit under test. A small amount of synchronization and comparison circuitry is necessary to perform the BIST. A methodology for designing the BIST hardware is described and results are discussed. The method is seen to be both efficient and low cost

Keywords

VLSI; analogue integrated circuits; automatic testing; built-in self test; integrated circuit testing; mixed analogue-digital integrated circuits; shift registers; transient response; BIST hardware design; analog circuits; built-in self test scheme; comparison circuitry; digital linear feedback shift register; digital-compatible BIST scheme; low-cost BIST scheme; pulse response sampling; rectangular pulses; synchronization circuitry; transient testing; Analog circuits; Automatic testing; Built-in self-test; Circuit testing; Design methodology; Feedback circuits; Linear feedback shift registers; Performance evaluation; Pulse circuits; Space vector pulse width modulation;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Test Symposium, 1997., 15th IEEE

Conference_Location

Monterey, CA

ISSN

1093-0167

Print_ISBN

0-8186-7810-0

Type

conf

DOI

10.1109/VTEST.1997.600285

Filename

600285