Parylene-Pocket Chip Integration

In this paper, we present a novel packaging technique that utilizes a simple, flexible parylene (chip) pocket on silicon substrate with metal pads. This pocket can house an IC chip or a discrete component inside and provide electrical connections to it. On the other hand, recent achievement in silicon probes implantation in the parietal cortex enables technological advances in neural prosthesis research. However, most of these technologies suffer from high signal-to-noise ratio and expensive integration scheme with IC chips or lack thereof. As a demonstration, this work uses this technique to produce an 8-shank silicon probe array integrated with a fully functional 16-channel amplifier CMOS chip.