Title :
Functional test pattern generation for CMOS operational amplifier
Author :
Chang, Soon Jyh ; Lee, Chung Len ; Chen, Jwu E.
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
27 Apr-1 May 1997
Abstract :
In this paper, the optimum functional patterns for CMOS operational amplifier are proposed based on an analysis to find the maximum difference between the good circuit and the faulty circuit for a CMOS operational amplifier. The theoretical and simulation results show that the derived test patterns do give the maximum difference at the output even when the circuit has a “soft” fault. The results have also been applied to generate test patterns for a programmable gain/loss mixed signal circuit
Keywords :
CMOS analogue integrated circuits; VLSI; integrated circuit testing; operational amplifiers; CMOS operational amplifier; IC testing; functional test pattern generation; op amp testing; programmable gain/loss mixed signal circuit; Analog integrated circuits; Circuit faults; Circuit testing; DC generators; Frequency; Operational amplifiers; Pattern analysis; Signal generators; Test pattern generators; Voltage;
Conference_Titel :
VLSI Test Symposium, 1997., 15th IEEE
Conference_Location :
Monterey, CA
Print_ISBN :
0-8186-7810-0
DOI :
10.1109/VTEST.1997.600287
