Impact of behavioral learning on the compilation of sequential circuit tests

Learning techniques based on behavioral descriptions of designs are introduced. The information generated using these techniques is reusable not only during the generation of test knowledge for the design, but also during the generation of tests for the design, and hence it is a one-time effort. Results are provided to demonstrate the impact of behavioral learning techniques on the quality of sequential circuit tests generated for modular and hierarchical designs. The design and test knowledge representation schemes, most of which have been introduced in the past, are discussed briefly. The behavioral learning techniques are then introduced. Results obtained for a simple CPU design are discussed.