• DocumentCode
    3046952
  • Title

    Design of adders with quaternary logic

  • Author

    Hajare, Shweta ; Dakhole, Pravin

  • Author_Institution
    Dept. of Electron. Eng., Yeshwantrao Chavan Coll. of Eng., Nagpur, India
  • fYear
    2015
  • fDate
    28-30 May 2015
  • Firstpage
    599
  • Lastpage
    601
  • Abstract
    For many processing operation addition forms the basis, that is from counting to multiplication to filtering. As a result adder circuit are important therefore we have proposed design of quaternary adders such as quaternary ripple carry adder, quaternary carry look-ahead adder, quaternary carry select adder. The various quaternary adders shows power consumption of 64% less as compared to binary circuits & delay reduction by 80% as compared to binary circuit.
  • Keywords
    adders; logic circuits; logic design; adder circuit design; binary circuits; delay reduction; power consumption; quaternary carry look-ahead adder; quaternary carry select adder; quaternary logic; quaternary ripple carry adder; Adders; CMOS integrated circuits; Delays; Logic gates; Power demand; Wires; Multiple valued logic (MVL) down literal circuit; Quaternary logic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Industrial Instrumentation and Control (ICIC), 2015 International Conference on
  • Conference_Location
    Pune
  • Type

    conf

  • DOI
    10.1109/IIC.2015.7150812
  • Filename
    7150812