DocumentCode :
3048119
Title :
ICAP-I: A reusable interface for the internal reconfiguration of Xilinx FPGAs
Author :
Lai, Victor ; Diessel, Oliver
Author_Institution :
Sch. of Comput. Sci. & Eng., Univ. of New South Wales, Sydney, NSW, Australia
fYear :
2009
fDate :
9-11 Dec. 2009
Firstpage :
357
Lastpage :
360
Abstract :
Application circuits configured on Xilinx Virtex series FPGAs are able to reconfigure the FPGA at run time using the on-chip ICAP. Traditional methods of accessing the ICAP using OPB-based and PLB-based schemes are unnecessarily complex and rarely reused. In this study, a new interface for accessing the ICAP is introduced. The interface is easy to use, it can readily be integrated to different systems, it is customizable, and it is reusable. A demonstration is crafted to show the use of the new interface. Performance results for the new interface and previous OPB-based and PLB-based methods are compared.
Keywords :
field programmable gate arrays; PLB-based schemes; Xilinx FPGA internal reconfiguration; Xilinx Virtex series FPGA; interface reusability; on-chip internal configuration access port; on-chip peripheral bus; processor local bus; Australia; Central Processing Unit; Circuits; Computer science; Error correction; Field programmable gate arrays; Intellectual property; Runtime;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology, 2009. FPT 2009. International Conference on
Conference_Location :
Sydney, NSW
Print_ISBN :
978-1-4244-4375-8
Electronic_ISBN :
978-1-4244-4377-2
Type :
conf
DOI :
10.1109/FPT.2009.5377616
Filename :
5377616
Link To Document :
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