Title :
Bit-serial pipeline synthesis and layout for large-scale configurable systems
Author :
Isshiki, Tsuyoshi ; Dai, Wayne Wei-Ming ; Kunieda, Hiroaki
Author_Institution :
Dept. of Electr. & Electron. Eng., Tokyo Inst. of Technol., Japan
Abstract :
In this paper, we present our datapath synthesis and layout tools which are targeted toward large-scale configurable systems with the logic capacity of up to millions of gates which consists of an easy design entry using C++, customized bit-serial circuit library for SRAM-based FPGAs, bit-serial pipeline circuit generator, and a circuit partitioner
Keywords :
circuit layout CAD; field programmable gate arrays; high level synthesis; C++; SRAM-based FPGAs; bit-serial pipeline circuit generator; circuit partitioner; datapath synthesis; easy design entry; large-scale configurable systems; layout; layout tools; logic capacity; pipeline synthesis; Algorithm design and analysis; Application software; Circuit synthesis; Data engineering; Design engineering; Field programmable gate arrays; Hardware; Large-scale systems; Logic devices; Pipelines;
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific
Conference_Location :
Chiba
Print_ISBN :
0-7803-3662-3
DOI :
10.1109/ASPDAC.1997.600298
