DocumentCode
3048527
Title
A lower bound for quantifying overlap effects: an empirical approach
Author
Bassetti, Federico
Author_Institution
Los Alamos Nat. Lab., NM, USA
fYear
1998
fDate
16-18 Feb 1998
Firstpage
253
Lastpage
259
Abstract
Among the many features that are implemented in today´s microprocessors there are some that have the capability of reducing the execution time via overlapping of different operations. Overlapping of instructions with other instructions and overlapping of computation with memory activities are the main way in which execution time is reduced. In this paper we will introduce a notion of overlap and its definition, and a few different ways to capture its effects. We will characterize some of the ASCI benchmarks using the overlap and some other quantities related to it. Also, we will present a characterization of the overlap effects using a lower bound derived empirically from measured data. We will conclude by using the lower bound to estimate other components of the overall execution time
Keywords
microprocessor chips; performance evaluation; ASCI benchmarks; lower bound; memory activities; microprocessors; overlap effects quantification; Acceleration; Clocks; Computer aided instruction; Delay; Equations; Laboratories; Microprocessors; Out of order; Parallel processing; Sun;
fLanguage
English
Publisher
ieee
Conference_Titel
Performance, Computing and Communications, 1998. IPCCC '98., IEEE International
Conference_Location
Tempe/Phoenix, AZ
ISSN
1097-2641
Print_ISBN
0-7803-4468-5
Type
conf
DOI
10.1109/PCCC.1998.659972
Filename
659972
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