A multiprogrammed workload model for energy and performance estimation of adaptive chip-multiprocessors

Summary form only given. Today, there is a trend towards steadily increasing functionality in mobile terminals. This trend in turn increases the performance demand on the architecture that is supposed to do all the work. It is likely that more traditional architectures like multiprocessors are used in future mobile terminals. They are attractive because they can now be integrated on a single chip and can provide the desired performance efficiently if intelligently managed. Choosing the most efficient architecture configuration is however a complex issue and depends on multiple factors. We believe that the way the behavior of the workload is modeled is of paramount importance when estimating the efficiency of any proposed architecture for future mobile terminals. Therefore, a deterministic and simple workload description is needed. In this paper, we show how such a multiprogrammed workload is created and used for energy and performance estimation of an adaptive chip-multiprocessor (CMP) architecture.